HotRIO Master Sub-Block
The HotRIO Master Sub-Block is a communication-interface sub-block that provides the microcontroller with access to status, diagnostic, and configuration information for a HotRIO Master connection on the board.
As described in the corresponding section, the position of this sub-block depends on the ordering of preceding blocks and on the size of the Hardware Interfaces block. Consequently, the base address of this sub-block is parameter-dependent. In this document, all register addresses are specified relative to an offset.
Sub-Block header
The sub-block starts with a constant (CONST) header containing:
an 8-bit identifier for this sub-block type; and
an 8-bit field indicating optional features available in this sub-block.
For this sub-block, no optional features are defined; therefore, the feature field is reserved. The sub-block ID is 2.
[Offset + 0x0000] - Sub-block header (CONST)
Communications interface sub-block optional features
Communications interface sub-block type
Register Sub-block header with access policy (CONST)
Signals:
- Communications interface sub-block type [0,7] ID of this communications interface sub-block. In this case it does correspond to the HotRIO Master sub-block ID
Default value : 2
- Communications interface sub-block optional features [8,15] Optional features field for this sub-block. In this case it is 0 as no optional features are avaialble
Default value : 0
Status register
The HotRIO Master Sub-Block provides a status register from which diagnostic indicators describing the current state of the HotRIO Master can be read.
Any change in master status observed through this register shall be signaled by asserting the Communication-interface status flag in the Interrupt register.
[Offset + 0x0001] - HotRIO Master status register (RO)
HotRIO Master sync output
Register HotRIO Master status register with access policy (RO)
Signals:
HotRIO Master sync output [0,0] Flag asserted when the state machine is synchronized with markers in the RX stream
Diagnostics
The HotRIO Master Sub-Block includes five diagnostic registers exposed by the HotRIO Master module. These registers provide monitoring metrics for the microcontroller to supervise the HotRIO Master communication interface.
[Offset + 0x0002] - Packets received (RO)
HotRIO Master packets received
Register Packets received with access policy (RO)
Signals:
HotRIO Master packets received [0,15] uint16_t counter of packets received by this HotRIO Master interface since last reset (included those forwarded to other nodes)
[Offset + 0x0003] - kchar error counter (RO)
HotRIO Master k-char error counter
Register kchar error counter with access policy (RO)
Signals:
HotRIO Master k-char error counter [0,15] uint16_t counter of wrong and/or wrongly positioned special characters received since last reset
[Offset + 0x0004] - parity error counter (RO)
HotRIO Master parity error counter
Register parity error counter with access policy (RO)
Signals:
HotRIO Master parity error counter [0,15] uint16_t counter of parity errors detected since last reset
[Offset + 0x0005] - CTC error (RO)
HotRIO Master CTC error counter
Register CTC error with access policy (RO)
Signals:
HotRIO Master CTC error counter [0,15] uint16_t counter of CTC FIFO overrun and/or underrun errors since last reset
[Offset + 0x0006] - CTC events (RO)
HotRIO Master CTC event counter
Register CTC events with access policy (RO)
Signals:
HotRIO Master CTC event counter [0,15] uint16_t counter of CTC adjustment events since last reset