Xilinx Guide

Installation

The script was build around Vivado/SDK version 2019.1. To download the software, an account is needed on the Xilinx website. The 2019.1 version is available in the Download page, under the “Vivado Archives” section.

Note: The Installation procedure requires administrative privileges.

During Installation, select the Vivado HD Design Edition. Make sure to select the SDK option in the next page.

The following paths must be added to te PATH environment variable: - C:XilinxVivado2019.1bin - C:XilinxSDK2019.1bin

After Installation, the board file must be manually installed. To do this copy the TE0808_9EG_1E folder inside the following directories:

(For windows) - C:XilinxVivado2019.1databoardsboard_files - C:XilinxSDK2019.1databoardsboard_files (For linux) - /tools/Xilinx/Vivado/2019.1/data/boards/board_files/ - /tools/Xilinx/SDK/2019.1/data/boards/board_files/

TODO

  1. Load the lastest .hdf file in the project by copying it in the hotrio-software/firmware/source/gtd_xilinx/sw/hotrio_project.sdk/ folder.

  2. Run the generate_project.sh script from the hotrio-software/firmware/source/gtd_xilinx folder. This can be done in windows by using Git Bash and running sh generate_project.sh.

  3. Generate the XSDK project by entering the option 5. Notes:

    • this step will create and run .bat files in the tmp folder. This can be blocked by group policies.

    • On successive runs, run the command 258 to clean the project. Note that running 369 will also delete the .hdf file.

  4. Open the XSDK project by running the same script and entering the option 6.

  5. Build the project: Project -> Build All.

  6. Configure the debugger: Run -> Debug Configurations

  7. Double click on Xilinx C/C++ application (System Debugger)

  8. Select the Debug Type as Standalone Application Debug

  9. Tick the box for Reset entire system

  10. On the application tab, tick the first box for psu_cortexa53_0.

  11. With the first row selected, on the bottom click Search and select the build binaries with the Debug version of the Qualifier.

  12. Click Apply and Debug. This will upload the firmware and start the debugger. The debugger will stop at the first line of the main function.

  13. To start the program, click on the Resume button (F8).

  14. To read/write registers, open the XSCT console (top right) and type the following commands:

  • mrd [address] to read

  • mwr [address] [value] to write

Vivado ILA

This section describes how to use the Integrated Logic Analyzer (ILA) in Vivado to debug the FPGA design for a compiled project.

To follow these steps, three files are needed:

  • The project bitstream (.bit)

  • ?? (.ltx)

  • ?? (debug_nets.ltx)

  1. Open Vivado

  2. Click Open Hardware Manager

  3. Connect to the board via Tools->Auto Connect

  4. ?? Go to the path of the files ??

  5. On the left side, on the Hardware tab, righ clock on xczu9 (under xilinx_tcf/Digilent), Program device, select the bistream (.bit file). The debug probes files should be filled automatically.

  6. Program (this will flash ONLY the FPGA). At this point the FPGA is programmed but kept on reset by the microcontroller.