Globals Package

Introduction

The globals package can be divided in three parts, the first part contains generic constants and type declarations. The second part contains constants and types for the various module contained in this repository, while the final part contains a series of functions used over the different modules

Generic

  • array_slv: An array type of std_logic_vector of any fixed length.

  • array_slv7: An array type of std_logic_vector with a length of 7 bits.

  • array_slv8: An array type of std_logic_vector with a length of 8 bits.

  • array_slv14: An array type of std_logic_vector with a length of 14 bits.

Configuration registers

This section contains the constants and types used in the spi interface and register tree.

Constants

  • CONFIG_DATA_WIDTH: The width of the configuration data.

  • CONFIG_REGS_READ: Read operation selector.

  • CONFIG_REGS_WRITE: Write operation selector.

Types

config_register_in_t

Register input interface. Contains the following fields:

  • wr_rd_sel: Operation type selector (CONFIG_REGS_READ for Read, CONFIG_REGS_WRITE for Write).

  • valid_op: Pulse to execute the selected operation.

  • data: Data to be written.

The constant CONFIG_REGISTER_IN_INIT can be used for initializing it.

config_register_in_array

An array type of config_register_in_t, useful for managing arrays of configuration register input interfaces. Contains the following fields:

  • wr_rd_sel: Operation type selector (CONFIG_REGS_READ for Read, CONFIG_REGS_WRITE for Write).

  • valid_op: Pulse to execute the selected operation.

  • data: Data to be written.

The constant CONFIG_REGISTER_IN_INIT can be used for initializing it.

config_register_out_t

Register output interface. Contains the following fields:

  • data: Data output.

  • data_valid: Pulse to signal the validity of the output data.

The constant CONFIG_REGISTER_OUT_INIT can be used for initializing it.

config_register_out_array

An array type of config_register_out_t, useful for managing arrays of configuration register output interfaces.

PCS

This section contains the constants and types used in the pcs interface.

Constants

Contains the declaration of the 8b/10b special characters:

  • K28_0

  • K28_1

  • K28_2

  • K28_3

  • K28_5

  • K23_7

  • K27_7

Types

pcs_frequencies

An enumeration type representing the PCS frequencies. Possible values are:

  • FREQ_40

  • FREQ_125

  • FREQ_250

HotRIO

This section contains the constants and types used in the HotRIO interface.

Constants

  • HOTRIO_PROTOCOL_ID: The HotRIO protocol ID.

  • HOTRIO_PACKETS_PER_FRAME: The number of packets per frame.

  • HOTRIO_PAYLOAD_SIZE: The size of the payload in bits.

  • HOTRIO_BYTES_PER_PACKET: The number of bytes per packet.

  • HOTRIO_BYTES_PER_FRAME: The number of bytes per frame.

  • HOTRIO_PO: Position of the parity odd bit in the C byte of the HotRIO packet.

  • HOTRIO_PE: Position of the parity even bit in the C byte of the HotRIO packet.

  • HOTRIO_RE3: Position of the reserved 3 bit in the C byte of the HotRIO packet.

  • HOTRIO_RE2: Position of the reserved 2 bit in the C byte of the HotRIO packet.

  • HOTRIO_RE1: Position of the reserved 1 bit in the C byte of the HotRIO packet.

  • HOTRIO_RE0: Position of the reserved 0 bit in the C byte of the HotRIO packet.

  • HOTRIO_CS: Position of the chip select bit in the C byte of the HotRIO packet.

  • HOTRIO_SD: Position of the serial data bit in the C byte of the HotRIO packet.

  • HOTRIO_K: Sync/SoF (K28.5) special character.

  • HOTRIO_2U: 2Microsecond (K28.1) special character.

  • HOTRIO_M: Millisecond (K28.2) special character.

  • HOTRIO_S: Second (K28.3) special character.

Types

hotrio_packet_t

A record type representing the packet format for the Hotrio interface. Contains the following fields:

  • address: 8-bit standard_logic_vector representing the address of the packet.

  • payload: A standard_logic_vector with the size of HOTRIO_PAYLOAD_SIZE.

  • spi_cs : Chip select signal for the SPI interface.

  • spi_sd : Serial data signal for the SPI interface.

  • reserved : Unused 4 bits in the control signal.

The constant HOTRIO_PACKET_T_INIT can be used for initializing it.

cRIO

This section contains the constants and types used in the cRIO interface.

Constants

  • WRITE_TO_CRIO: Write operation selector.

  • READ_FROM_CRIO: Read operation selector.

  • CRIO_DATA_LENGTH: The length of the cRIO data.

  • CRIO_CFG_LENGTH: The length of the cRIO configuration.

  • CRIO_CFG_ADDR_LENGTH: The length of the cRIO configuration address.

  • CRIO_CMD_SELECT_REG1: Address of register 1.

  • CRIO_CMD_SELECT_REG2: Address of register 2.

  • CRIO_EE_ROM_SIZE: The size of the cRIO EEPROM.

  • CRIO_EE_CMD_LENGTH: The length of the cRIO EEPROM command.

  • CRIO_EE_DATA_LENGTH: The length of the cRIO EEPROM data.

  • CRIO_EE_ADDR_LENGTH: The length of the cRIO EEPROM address.

  • CRIO_SPI_FUNC_c: Index for the dual purpose pins of the dio.

  • CRIO_SPI_CS_N_c: Index for the dual purpose pins of the dio.

  • CRIO_SPI_MISO_c: Index for the dual purpose pins of the dio.

  • CRIO_SPI_MOSI_c: Index for the dual purpose pins of the dio.

ADCs

This section contains the constants and types used in the ADCs interface.

Constants

  • BIT_MODE_14_c: 14-bit mode selector.

  • BIT_MODE_16_c: 16-bit mode selector.

  • BIT_MODE_18_c: 18-bit mode selector.

  • BIT_MODE_20_c: 20-bit mode selector.

  • WIRE_MODE_2_c: 2-wire mode selector.

  • WIRE_MODE_1_c: 1-wire mode selector.

  • WIRE_MODE_1_2_c: 1/2-wire mode selector.

Functions

  • clog2: Computes the number of bits required to represent a positive integer value in binary. This function takes a positive integer as input and returns the number of bits required.

  • sign_extension: Generates a sign extended std_logic_vector by appending the msb value of the input vector as msb of the result until the requested size is reached. This function takes a std_logic_vector and a positive integer as input and returns another std_logic_vector.

  • get_parity_cfg: Gets the parity bit from a std_logic_vector, allowing to configure how many positions to increase on every iteration, and the starting-bit position. This function takes a std_logic_vector, a positive integer, and a natural number as input and returns the parity bit.

  • reverse_endianness: Produces a copy of the input vector in which the endianness of each byte is reversed. Takes a std_logic_vector of size divisible by 8 as input and returns a std_logic_vector of the same size.